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Sourcecode Batteriemanagementsystem |
Chip-specific PLL management functions. Mehr ...
#include <compiler.h>
gehe zum Quellcode dieser Datei
Datenstrukturen | |
struct | pll_config |
Makrodefinitionen | |
#define | NR_PLLS 1 |
#define | pll_config_defaults(cfg, pll_id) |
#define | pll_get_default_rate(pll_id) |
#define | PLL_MAX_HZ 200000000UL |
#define | PLL_MIN_HZ 10000000UL |
#define | PLL_NR_OPTIONS 0 |
Aufzählungen | |
enum | pll_source { PLL_SRC_RC2MHZ = OSC_PLLSRC_RC2M_gc, PLL_SRC_RC32MHZ = OSC_PLLSRC_RC32M_gc, PLL_SRC_XOSC = OSC_PLLSRC_XOSC_gc } |
Funktionen | |
static void | pll_config_init (struct pll_config *cfg, enum pll_source src, unsigned int div, unsigned int mul) |
static void | pll_config_read (struct pll_config *cfg, unsigned int pll_id) |
static void | pll_config_write (const struct pll_config *cfg, unsigned int pll_id) |
static void | pll_disable (unsigned int pll_id) |
static void | pll_enable (const struct pll_config *cfg, unsigned int pll_id) |
static void | pll_enable_config_defaults (unsigned int pll_id) |
static void | pll_enable_source (enum pll_source src) |
static uint32_t | pll_get_default_rate_priv (enum pll_source src, unsigned int mul, unsigned int div) |
Return clock rate for specified PLL settings. Mehr ... | |
static bool | pll_is_locked (unsigned int pll_id) |
static int | pll_wait_for_lock (unsigned int pll_id) |
Chip-specific PLL management functions.
Copyright (c) 2010-2015 Atmel Corporation. All rights reserved.
Definiert in Datei pll.h.