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Sourcecode Batteriemanagementsystem
twi_master_driver.h
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1 /* This file has been prepared for Doxygen automatic documentation generation.*/
60 /*
61  * controllerboard.h
62  *
63  * @date 01.09.2013 10:45:50
64  * Author: max
65  *
66  *
67  * Version : $Revision: 351 $
68  * Letzte Ă„nderung: $Date: 2016-03-19 23:27:55 +0100 (Sa, 19 Mrz 2016) $
69  * von : $Author: svn_user $
70  *
71  */
72 
73 #ifndef TWI_MASTER_DRIVER_H
74 #define TWI_MASTER_DRIVER_H
75 
76 #include <stdbool.h>
77 #include <stdio.h>
78 #include <util/delay.h>
79 #include <avr/io.h>
80 
82 #define TWI_BAUD(F_SYS, F_TWI) ((F_SYS / (2 * F_TWI)) - 5)
83 
85 #define TWIM_STATUS_READY 0
86 #define TWIM_STATUS_BUSY 1
87 
89 typedef enum TWIM_RESULT_enum
90 {
91  TWIM_RESULT_UNKNOWN = (0x00 << 0), TWIM_RESULT_OK = (0x01 << 0), TWIM_RESULT_BUFFER_OVERFLOW = (0x02 << 0), TWIM_RESULT_ARBITRATION_LOST = (0x03 << 0), TWIM_RESULT_BUS_ERROR = (0x04 << 0), TWIM_RESULT_NACK_RECEIVED = (0x05 << 0), TWIM_RESULT_FAIL = (0x06 << 0),
93 
95 #define TWIM_WRITE_BUFFER_SIZE 8
96 #define TWIM_READ_BUFFER_SIZE 16
97 
103 typedef struct TWI_Master
104 {
105  TWI_t *interface;
106  register8_t address;
108  register8_t readData[TWIM_READ_BUFFER_SIZE];
109  register8_t bytesToWrite;
110  register8_t bytesToRead;
111  register8_t bytesWritten;
112  register8_t bytesRead;
113  register8_t status;
114  register8_t result;
115 } TWI_Master_t;
116 
117 void TWI_MasterInit ( TWI_Master_t *twi, TWI_t *module, TWI_MASTER_INTLVL_t intLevel, uint8_t baudRateRegisterSetting );
118 TWI_MASTER_BUSSTATE_t TWI_MasterState ( TWI_Master_t *twi );
119 
120 bool TWI_MasterReady ( TWI_Master_t *twi );
121 bool TWI_MasterWrite ( TWI_Master_t *twi, uint8_t address, uint8_t * writeData, uint8_t bytesToWrite );
122 bool TWI_MasterRead ( TWI_Master_t *twi, uint8_t address, uint8_t bytesToRead );
123 bool TWI_MasterWriteRead ( TWI_Master_t *twi, uint8_t address, uint8_t *writeData, uint8_t bytesToWrite, uint8_t bytesToRead );
124 
128 void TWI_MasterReadHandler ( TWI_Master_t *twi );
129 void TWI_MasterTransactionFinished ( TWI_Master_t *twi, uint8_t result );
130 
144 #endif /* TWI_MASTER_DRIVER_H */
register8_t writeData[TWIM_WRITE_BUFFER_SIZE]
void TWI_MasterArbitrationLostBusErrorHandler(TWI_Master_t *twi)
TWI master arbitration lost and bus error interrupt handler.
TWI_MASTER_BUSSTATE_t TWI_MasterState(TWI_Master_t *twi)
Returns the TWI bus state.
bool TWI_MasterWriteRead(TWI_Master_t *twi, uint8_t address, uint8_t *writeData, uint8_t bytesToWrite, uint8_t bytesToRead)
TWI write and/or read transaction.
register8_t status
void TWI_MasterReadHandler(TWI_Master_t *twi)
TWI master read interrupt handler.
register8_t address
register8_t readData[TWIM_READ_BUFFER_SIZE]
register8_t bytesToRead
void TWI_MasterTransactionFinished(TWI_Master_t *twi, uint8_t result)
TWI transaction finished handler.
enum TWIM_RESULT_enum TWIM_RESULT_t
void TWI_MasterInit(TWI_Master_t *twi, TWI_t *module, TWI_MASTER_INTLVL_t intLevel, uint8_t baudRateRegisterSetting)
Initialise the TWI module.
register8_t bytesToWrite
register8_t result
bool TWI_MasterRead(TWI_Master_t *twi, uint8_t address, uint8_t bytesToRead)
TWI read transaction.
struct TWI_Master TWI_Master_t
TWI master driver struct.
void TWI_MasterInterruptHandler(TWI_Master_t *twi)
Common TWI master interrupt service routine.
bool TWI_MasterWrite(TWI_Master_t *twi, uint8_t address, uint8_t *writeData, uint8_t bytesToWrite)
TWI write transaction.
register8_t bytesWritten
void TWI_MasterWriteHandler(TWI_Master_t *twi)
TWI master write interrupt handler.
TWI master driver struct.
bool TWI_MasterReady(TWI_Master_t *twi)
Returns true if transaction is ready.
TWIM_RESULT_enum
register8_t bytesRead
#define TWIM_WRITE_BUFFER_SIZE